Physical Design - Team Lead
Ahmedbad India
Job Description
Desired total experience: • 6+ years of direct relevant experience Technical details: (Must have the following skill sets) • Hands-on experience in the complete ASIC backend flow using Cadence SoCEncounter or Synopsys or Magma Tools. Experience in Cadence/Synopsys tools is preferred. • Experience of 3 or more ASIC tape-outs • Timing closure using PT • Floor planning, Power route, Clock Tree Synthesis, Global/Detail Route, Cross talk avoidance, signal integrity and EMIR analysis • DRC/LVS verification, antenna fixing. • Hard macro insertion Desired skill sets: • Knowledge of Verilog and C (programming languages) • Good knowledge of the entire ASIC design flow from concept to silicon • Good knowledge of CMOS devices • Digital timing fundamentals • Scripting languages (Perl, Tcl/Tk, C-shell) • Physical design experience in 65-90nm technologies. • Mutli-Vdd flow • Timing closure for high speed interfaces like DDR2 • Low power design techniques Industry exposure: 65nm to 180nm designs using TSMC/UMC/CSC libraries Deliverables for this person for the first 6 months: • Oversee the activities on one or more customer project(s) • Manage and motivate the Physical design team to deliver high quality output • Training the junior engineers • Recruit 5 engineers (2-senior and 3-junior)
We are looking for
B.Tech / B.E (ECE) with / BE (ECE) from a recognized university
The following will be a plus
PG diploma in VLSI design / M.Tech in Microelectronics from a recognized university or institution
Interested
If you are interested in this opening, please send us your updated profile to deepti.arora@einfochips.com. Quote EDAIndia.com and the position that you are applying for in the subject line e.g.
Subject:EDAIndia.com, Application for the post of Team Lead-Physical design
Quote job code EDAIndia.com-57533216 and the position that you are applying for in the subject line e.g.
Subject:EDAIndia.com-57533216, Application for the post of Physical Design - Team Lead
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