|
|
||||
|
||||
| Forum name | Last post | Topics | Posts | |
Languages | ||||
![]() |
Perl for eda Discission on Perl scripting as applicable to Electronic design Moderator: YaBB Administrator |
Mar 8th, 2006, 10:46amIn: Question on perl usage By: jahagirdar_vs |
1 | 1 |
![]() |
verilog Verilog and system verilog languages Moderator: YaBB Administrator |
Jul 29th, 2008, 6:53pmIn: PG Diploma in VLSI Design... By: rajeshshetty |
9 | 12 |
![]() |
VHDL |
Jul 29th, 2008, 6:52pmIn: PG Diploma in VLSI Design... By: rajeshshetty |
3 | 3 |
![]() |
Verification Specman e , Vera, System Verilog, C, C++, SystemC, Verilog, PLI etc |
Jan 1st, 2008, 11:39amIn: Free Seminar on SystemVer... By: cvc.training |
1 | 1 |
Tools | ||||
![]() |
Synthesis Tools Eda tools Moderator: YaBB Administrator |
Feb 27th, 2008, 12:06pmIn: VLSI Training from Indust... By: rajeshshetty |
2 | 2 |
![]() |
Verification Tools specman,modelsim,vcs,gcc |
Jan 1st, 2008, 11:40amIn: Free Seminar on SystemVer... By: cvc.training |
3 | 3 |
![]() |
Other scripts and tools Other helper scripts useful in day to day work |
Oct 21st, 2006, 10:49pmIn: EDAIndia releases its SQL... By: YaBB Administrator |
2 | 2 |
Site Design | ||||
![]() |
EDAIndia Community Development Discussion on the site development. Resources required by the community. and status update on the roadmap. |
Feb 27th, 2008, 1:13pmIn: VLSI Training by Industry... By: rajeshshetty |
5 | 9 |
![]() |
Discussion on the monthly Newsletter Every month we sendout a newsletter listing out the top stories of that month. this board is for members to discuss about these stories |
Apr 7th, 2006, 9:16amIn: Re: March 2006 The Month... By: vickram |
1 | 3 |
![]() |
The Free online Bookshelf Discussion Discuss proposals for books, chapters, sections on various topics related to electronic design. Review work submitted by others. Put in your Idea as to how this should progress. |
May 24th, 2006, 11:29pmIn: Re: Book ready how do I u... By: YaBB Administrator |
2 | 2 |
Technology | ||||
![]() |
ASIC ASIC Fabrication process. RTL coding for ASICS. etc Moderator: YaBB Administrator |
Feb 27th, 2008, 11:57amIn: VLSI Training from Indust... By: rajeshshetty |
3 | 3 |
![]() |
FPGA FPGA Technology |
Jul 29th, 2008, 6:45pmIn: Cast your vote By: rajeshshetty |
3 | 3 |
Design Flow | ||||
![]() |
Design for testability Moderator: YaBB Administrator |
N/AIn: By: N/A |
0 | 0 |
Misc | ||||
![]() |
Companies Update to company information Moderator: YaBB Administrator |
Sep 19th, 2007, 2:49pmIn: Get ur Jobs by sms in Ind... By: vinod1986 |
8 | 9 |
![]() |
Head hunters and job board Moderator: YaBB Administrator |
Jan 30th, 2008, 6:19pmIn: Re: Every one Getting VLS... By: tiit_shashi |
12 | 18 |
![]() |
Misc Catch all for topics that cannot be discussed in the other forums Moderator: YaBB Administrator |
Sep 19th, 2007, 2:42pmIn: Now get paid for reading... By: vinod1986 |
3 | 3 |
![]() |
Training in embedded and VLSI Information about institutes providing training in the field of VLSI design |
Jul 29th, 2008, 6:48pmIn: PG Diploma in VLSI Design... By: rajeshshetty |
18 | 22 |
New Posts
No New Posts
|
| Info Center | |
| Forum Statistics | |
|
Our users have made 96 Posts within 76 Topics.
The most recent post is PG Diploma in VLSI Design using FPGA- 11-09-08 (Jul 29th, 2008, 6:53pm). View the 10 most recent posts of this forum.
We have 212 registered members.
The newest member is tiit_vlsi_blr. |
|
Most Users ever online was 46 on May 6th, 2008, 6:11pm
Most Members ever online was 2 on Sep 7th, 2006, 11:18am Most Guests ever online was 46 on May 6th, 2008, 6:11pm |
| Users online | |
|
Members: 0
Guests: 3 lllll YaBB Administrator lllll Global Moderator
|
| Login | |
![]() |
|