You are invited to contribute to this knowledgebase on design. Feel free to edit existing pages or add new ones on Aspects of IC Design be it ASIC FPGA or Systems

This Wiki has been setup to consolidate the knowledge on System Architecture ASIC Design and Digital Design Techniques. We will be covering Traditional HDL's like Verilog, VHDL and ESL Tools based on C, C++, System Verilog We will cover different modeling strategies using SystemC, SpreadSheets, NS2, OmnetPP etc. And finally we will look at Verification both formal verification and dynamic simulations and Synthesis

This wiki currently contains the following topics

# ID Links
1wiki:syntax5 : Show backlinks
2wiki:pagename4 : Show backlinks
3wiki:dokuwiki3 : Show backlinks
4some:namespaces2 : Show backlinks
5multiclock_designs1 : Show backlinks
6asic_design1 : Show backlinks
7digital_design1 : Show backlinks
8system_architecture1 : Show backlinks
9playground:playground1 : Show backlinks
10esl1 : Show backlinks
11low_power_asic_design1 : Show backlinks
12requirement_gathering1 : Show backlinks

There is a need for a new page on one of the following subjects. Please create them if possible

# ID Links
1synthesis2 : Show backlinks
2verification2 : Show backlinks
3vhdl1 : Show backlinks
4system_verilog1 : Show backlinks
5wiki:nonexisting1 : Show backlinks
6systemc1 : Show backlinks
7verilog1 : Show backlinks
8omnetpp1 : Show backlinks
9dynamic_simulations1 : Show backlinks
10formal_verification1 : Show backlinks
11ns21 : Show backlinks
12spreadsheets1 : Show backlinks
13synchronization_techniques1 : Show backlinks
14tapeout1 : Show backlinks
15testbench_creation1 : Show backlinks
16p_r1 : Show backlinks
17sta1 : Show backlinks
18dft1 : Show backlinks
19high_speed_design1 : Show backlinks
20verification_plan1 : Show backlinks
21testcase_creation1 : Show backlinks
22glitch_free_clocks_muxing1 : Show backlinks
23hardware_software_partitioning1 : Show backlinks
24clocks_and_resets1 : Show backlinks
25requirement_analysis1 : Show backlinks

The following pages have been started but would benefit from your help to completion

low power asic design 2009/10/22 04:40  
Steps in ASIC Design 2009/10/09 15:31 ajay
What is Metastability 2010/04/08 13:46  
 
start.txt · Last modified: 2010/03/25 10:41 by edaindia     Back to top